Arhitecturi și structuri pentru calcul eterogen – Îmbunătățiri ale transferului de date pentru un sistem eterogen de calcul / Architectures and structures for heterogeneous computing - Improvements in data transfer for a heterogeneous computing system

The increasing demand for computing power at the lowest possible cost, as well as the significant gap between theoretical peak performance and actual performance of market-available solutions for parallel data processing, motivates research in the field of computing architectures. The main objective of the thesis was to propose a fully functional heterogeneous computing system based on an improved architecture of a MapReduce Accelerator that provides an efficient and flexible alternative solution for applications that require parallel data processing. The development of a new MapReduce architecture was made on the basis of an already existing Accelerator, for which the data transfer between the processing elements and the main memory was improved. The improvement measures consisted mainly of the reorganization of the matrix of processing elements and the separation of the I/O data transfer and processing flows. The Accelerator was integrated into a heterogeneous computing system, built in such a way as to ensure the most efficient interaction of the Accelerator with the rest of the system, considering the resources available on the platform on which it was implemented (i.e., the Zynq-7020 SoC). To allow the user to interact with the system implemented on hardware, a Python-based programming environment was developed. This environment allows the user to write, using a specific assembly language, programs and libraries of functions targeting the Accelerator. The proposed heterogeneous computing system was evaluated for basic linear algebra tasks, highlighting both the correct operation and the performance improvements brought by the new architecture.